For certain ECO cases, specifically those involving changes to combinational signals, manual ECOs may prove to be quicker and more effective. However, identifying equivalent wires in the netlist for RTL signals can be a challenging aspect of such manual ECOs. This is primarily due to the fact that combinational signals are often optimized during synthesis. To help alleviate this issue, GOF offers an API called 'find_equal_nets' as well as GUI operations to assist in the search for equivalent nets in the netlist for RTL signals.

Example script to find equal nets

The following is the example script for finding equal nets in netlist for RTL:

# GOF script, find_equal_nets.pl
use strict;
read_library("art.5nm.lib");# Read in standard library
set_define("SYNTHESIS");
set_define("NO_SIM");
set_inc_dirs("/project/nd900/vlib/include", "/project/nd900/IPS/include");
read_rtl('-ref', "ref0.sv", "ref1.sv", "ref2.sv");
read_svf("-imp", "implementation.svf.txt");  # Optional, must be loaded before read_design, must be in text format
read_design("-imp", "implementation.gv");# Read in Implementation Netlist 
set_top("topmod");# Set the top module
elab_rtl;
find_equal_nets("row_full", "sync_start"); # Find row_full and sync_start in the netlist

Find equal nets on schematic

When a Reference Net is selected on schematic, right click mouse to pop up command window, select 'Find Equal Nets of the selected net'.

The following script is to start up the GUI window and schematic:

# GOF script, preserve RTL wires and start up GUI
use strict;
read_library("art.5nm.lib");# Read in standard library
set_define("SYNTHESIS");
set_define("NO_SIM");
set_inc_dirs("/project/nd900/vlib/include", "/project/nd900/IPS/include");
read_rtl('-ref', "ref0.sv", "ref1.sv", "ref2.sv");
read_svf('-imp', 'implementation.svf.txt');  # Optional, must be loaded before read_design, must be in text format
read_design("-imp", "implementation.gv");# Read in Implementation Netlist 
set_top("topmod");# Set the top module
preserve_modules("-all"); # Preserve wires in all modules during elaboration and compile
elaborate();
start_gui;

Load the instance driving the RTL wire in a schematic, right click mouse to pop up the command window, and select 'Find Equal Nets'.

Figure 1: Find IMP gate level net for REF RTL net

The equal nets are listed in a pop window, right click the link to send the found net back to the schematic.

Figure 2: Pop up window to list the matched nets

The equal net and its driving cell is displayed on the schematic. An ECO can be done on the fly by click 'ECO' button.

Figure 3: Display the equal nets in the same schematic

GUI ECO is done on the schematic.

Figure 4: GUI ECO is done on the fly


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