Contents
- Abstract
- Prepare GUI environment
- Find related gates on the schematic
- Find physical position of the logic under fix
- Circuit on LayoutViewer
- Find physical position of the enable logic on LayoutViewer
- Two related circuits on LayoutViewer
- Zoom view of LayoutViewer
- Find proper spare gates and send to schematic
- All resources on schematic
- Enable ECO
- Clean up spare gates
- Disconnect wire for AND gate insertion
- Connect up spare gates
- One connection done
- All connected up and save ECO
- Report window
- Verify the fix
- View ECOed circuit on LayoutViewer
GUI Mode Metal Only ECO
Abstract
In the traditional way, Metal ECO has to go back and forth between backend database and frontend netlist under ECO. A simple AND gate insertion logic fix needs intensive search for spare resource in backend database. Gates On the Fly combines the resource search and logic fix in one platform. The following use case shows how to read in physical database into Gates On the Fly, and finds the proper spare gates to fix an AND logic insertion.
The logic change is very simple, adding an AND gate to one output signal, but the enable signal for the AND gate may have some distance. Spare buffers may be needed to drive the enable signal.
Prepare GUI environment
Load in netlist and physical files by the command
../bin/gof -lib tm40.lib -def tser_post.def -lef tm_hvt.lef tser_post.v
When GofViewer Netlist browser window is up, find the related net and click 'New Schematic' button.
Figure 1. Load GUI database and bring up schematic
Find related gates on the schematic
Starting from the port, 'tseran_int0', use mouse-middle-button to trace the gates. Load the enable signal 'rx_mode' to the schematic as well and trace to make a proper circuit.
The logic change is essentially, "tseran_int0 = original_tseran_int0 & rx_mode"
Figure 2. Load related gates and signals
Find physical position of the logic under fix
Select the circuit under fix, right click mouse to select 'Copy Selected to' -> 'Layout New'
Figure 3. Send circuit to LayoutViewer
Circuit on LayoutViewer
The circuit is shown on LayoutViewer as lines and arrows.
Click to select another color when the first circuit is shown on LayoutViewer. So the new circuit view will be displayed in different color.
Figure 4. LayoutViewer 1
Find physical position of the enable logic on LayoutViewer
Select the enable logic circuit and send to the same LayoutViewer Index
Figure 5. Send enable logic to LayoutViewer
Two related circuits on LayoutViewer
Now two circuits are on one LayoutViewer. Find the closest part of them, spare gates will be found in that part.
Figure 6. Two related circuits shown on the same LayoutViewer
Zoom view of LayoutViewer
Zoom in to closest part between two circuits. Proper spare gates will be found in this area.
Figure 7. Zoom-in to the right place
Find proper spare gates and send to schematic
Select color 'green'.
Type 'mySpare*/*spr_gate*' in the bottom Search entry and high light all spare gates on the LayoutViewer.
Spare gates have type NAND NOR MUX INV, so AND gate has to be NAND+INV. A buffer is needed to drive 'rx_mode' signal from the circuit in orange. The buffer can be created from two back to back inverts.
So total 3 inverters and one NAND gate are needed.
Find NAND and INV gate close to the circuit in blue. 'mySpare_tserspr_23.NAND2_X4M_spr_gate326' and 'mySpare_tserspr_16.INV_X9M_spr_gate235'
Find big driver INV close to orange circuit, 'mySpare_tserspr_32.INV_X9M_spr_gate458'. Find another INV in between blue and orange circuits, 'mySpare_tserspr_23.INV_X9M_spr_gate333'
These two inverts are connected back to back to create a buffer.
Figure 8. Spare gates process on LayoutViewer
All resources on schematic
Figure 9. Spare gates on schematic
Enable ECO
Figure 10. Enable ECO
Clean up spare gates
Trace inputs to spare gates and delete the connections.
Figure 11. Delete spare gates inputs
Disconnect wire for AND gate insertion
The best place to insert AND gate is NAND4 output which is closest to the enable signal 'rx_mode'
Figure 12. Disconnect ECO spot
Connect up spare gates
Press mouse-middle-button on a spare input pin, don't release the button and move the button to the other gate's output pin it should connect to. Then release the button.
Figure 13. Wire connecting
One connection done
One connection is done and ports are automatically added to bridge up the hierarchies.
Figure 14. Connection done
All connected up and save ECO
Save the ECO in verilog mode, 'tser_eco.v'
Figure 15. ECO complete schematic
Report window
Figure 16. ECO report
Verify the fix
Load tser_eco.v and related physical files.
../bin/gof -lib tm40.lib -def tser_post.def -lef tm_hvt.lef tser_eco.v
Draw the related circuit and send to a new LayoutViewer.
Figure 17. Draw complete circuit
View ECOed circuit on LayoutViewer
Compare with figure 6, it's easy to see the spare gates used and connections are in the right location.
Figure 18. ECO verified on LayoutViewer