In Place & Route stage, clock buffer networks are built on clock trees. It's very inconvenient to trace clock buffers by reading text netlist file. The other commercial schematic tools do the trace of the clock tree by displaying buffers one by one. While GOF/GVT can display the whole clock tree by one mouse click.
The following dynamic schematic shows how to trace clock buffer by one click.
GOF Debug is netlist debug tool with GUI and script interface. It supports fully interactive partial schematic, so that logic tracing and ECO can be done on-the-fly on the schematic. Please visit this page for more detail.
