A Practical Way to Do Netlist ECO & Debug


  1. GOF beats Conformal ECO Case 3
    1. Summary
    2. Analysis
    3. Mixed ECO Methods
    4. Results Comparison
    5. Files in ECO
    6. GOF command line
    7. Conclusion

GOF beats Conformal ECO Case 3


The test case shows how to achieve minimum patch size by mixing Manual ECO and Automatic ECO. 


The ECO case has two changes in RTL codes.

Change 1: Replace input port 'A' by 'A&B'. That is, all original fanouts of 'A' are driven by new signal 'A&B'. Signal B is also a port. So both 'A' and 'B' can be easily located in netlist. And the change can be done manually easily.

Change 2: Modify an arithmetic logic. The original 'incrementer by one' logic is replaced by 'incrementer by variable bit'. The arithmetic change is hard to be implemented by manual ECO. It is much easier to be done by tool in an automatic way.

Figure 1: Two ECO Changes

Mixed ECO Methods

GOF uses mixed manual mode and automatic mode to implement the ECO. The two ECO changes are integrated into one ECO script.

# GofCall ECO script, eco.pl
use strict;  
undo_eco;  # Discard previous ECO operations
setup_eco("mixed_eco");  # Setup ECO name
read_library("m28.lib"); # Read in standard library

# Read in the Reference Netlist which is re-synthesized with several modules modified
read_design("-ref", "ref.v");  
# Read in the implementation Netlist Which is under ECO
read_design("-imp", "imp.v");  

set_top("ETOP"); # Set the top module

set_ignore_output("pin_sout*"); # To avoid test lockup to affect the ECO result
set_pin_constant("pin_scan_en",0); # To avoid test logic being touched

# The Manual ECO is to fix the change 1. Port A drives instance uvcal/place_60's in pin A. It is replaced by 'A&B'
# In the example files below, Port A has name "micho_1m" and Port B has name "ops_cal_start"

change_pin("uvcal/place_60/A", "SAND2X4", "uvcal/eco_11_8_16_ECOCELL_0", "-,uvcal/ops_cal_start"); 

# The Automatic ECO is to fix the change 2


report_eco(); # ECO report
write_verilog("eco_verilog.v"); # Write out ECO result in Verilog

Results Comparison

Three experiments have been run on the ECO case. The results are,

  1. Conformal ECO, in full automatic way, has ~45 new cells added
  2. Gates On the Fly, in full automatic way, has 31 new cells added
  3. Gates On the Fly, mixed manual way and automatic way, has only 15 new cells added.
ECO Result Total Cells Area
Conformal ECO ~45 22.7
GOF (Full Automatic ECO) 31 15.0
GOF (Mixed Mode ECO) 15 7.1

Files in ECO

  • gof_patch.v ----------------- GOF patch file, 15 cells
  • cfm_eco_patch_1.v ------- Conformal ECO patch file, >45 cells
  • imp.v -------------------------- Implementation netlist
  • ref.v --------------------------- Reference netlist
  • m28.lib ---------------------- Liberty file. Warning! Since timing information is removed, the file can not be used in Synthesis
  • eco.gpl -------------------------- GOF ECO script

GOF command line

The files can be downloaded to reproduce the result

gof -lib m28.lib imp.v -ref ref.v -run eco.gpl


Functional netlist ECO can be complicated. Fully relying on Automatic ECO tool can not generate the optimal result. Pure manual way is hard to implement if the change involves arithmetic changes. Gates On the Fly provides a practical solution to mix manual mode and automatic mode in ECO. The solution can generate the minimum patch size in ECOs.


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